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Friday, March 09, 2018

MIPS rides the AI wave

By Nick Flaherty

MIPS has used some recent design wins around the AI to remind people its still around in the embedded business following its sell off from Imagination Technologies. 

The newest deal for its 64bit core with Wave Computing (whose CEO Derek Meyer is a former senior exec at MIPS) is the main point, but existing customers such as Mobileye Vision Technologies (now owned by Intel) have also supported the instruction set.

NetSpeed Systems, Fungible, ThinCI and Denso are also using the tech for embedded chips. 

Wave is using the MIPS core for use in its next-generation of deep learning solutions to handle device management and control functions, including real-time operating system (RTOS) and system-on-chip (SoC) subsystem. The embedded MIPS core will boost the dataflow technology that enables fast and efficient processing of neural network graphs.

“MIPS is the established leader in the world of 64-bit embedded cores and consistently delivers leading-edge solutions that drive pioneering products. Today, our core is at the heart of some of the world’s most innovative designs that are fueling the explosive growth of AI,” said David Lau, MIPS’ Vice President of Engineering. “Our hardware Multi-Threading technologies set us apart from others, and the efficiency and extensibility of our processor architecture is well suited to deep learning and AI. While focusing on our core competencies, we are committed to propelling the development of emerging intelligent applications.”

Derek Meyer, CEO of Wave Computing, commented, “The MIPS processor’s 64-bit architecture will enable us to further support the memory address range needed for next-generation AI applications, while its Multi-Threading capabilities enables faster real-time and more efficient task management of our dataflow software agents. In addition, the MIPS ecosystem and development tool environments are well suited for rapidly growing applications like AI.”

The MIPS64 architecture continues to be used in a variety of applications from ADAS, and set-top boxes to networking and telecommunications infrastructure applications. It provides a solid high-performance foundation for future MIPS processor-based development by incorporating powerful features, hardware virtualization capabilities, standardizing privileged mode instructions, supporting past ISAs, and providing a seamless upgrade path from the MIPS32 architecture.

“Our collaboration with MIPS has played a significant role in numerous generations of Mobileye’s EyeQ SoCs for autonomous driving systems helped us achieving consistently best in class performance efficiency. In EyeQ5, Mobileye leverages the latest high-performance, highly efficient 64bit heterogeneous compute clusters of multi-threaded multi-core MIPS CPUs,” said Elchanan Rushinek, Vice President, Engineering at Mobileye. “The I6500-F Core from MIPS has helped us to achieve new level of performance, opening our platform and meeting our un-compromised functional safety goals.”

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