The MIPI Alliance has completed the first plugfest for the new I3C sensor interface.
Held in Barcelona, Spain, this was the first opportunity for early adopters of the new MIPI I3C sensor interface to perform interoperability testing of their designs for smartphones, IoT, automotive and other applications.
The event drew participants from semiconductor, IP and test equipment firms, demonstrating industry commitment to MIPI I3C and paving the way for commercialization of products and devices based on the specification. It highlighted the importance of interoperability testing early in the design cycle to ensure seamless functionality between devices and speed up time to market.
“Plugfests are an essential step in the product development process because the testing and debugging activities take place in real-world system integration environments, helping companies ensure interoperability of their components, improve product quality, speed the development process and optimize the manufacturability of their designs,” said Ken Foust, chair of the MIPI Alliance Sensor Working Group.
The new bus interface, approved in January, connects sensors to an application processor, combining multiple sensors from different vendors to streamline integration and improve cost efficiencies.
I3C can integrate mechanical, motion, biometric and environmental, and any other type of sensor and combines key attributes of the traditional I2C and SPI interfaces to provide a new, unified, high-performing, very low power solution.
The technology is implemented on a standard CMOS I/O with a two-wire interface, which reduces pin count and signal paths to offer system designers less complexity and more flexibility. It can also be used as a sideband interface to further reduce pin count. It supports a minimum data rate of 10 Mbps with options for higher performance high data rate modes, offering a substantial leap in performance and power efficiency compared with previous options.
It also includes multi-master support, dynamic addressing, command-code compatibility, and a uniform approach for advanced power management features, such as sleep mode and provides synchronous and asynchronous time-stamping to improve the accuracy of applications that use signals from various sensors. It can also batch and transmit data quickly to minimize energy consumption of the host processor.
Companies tested four master devices and six slave devices during the event. Participating companies include: BitifEye Digital Test Solutions in Germany, Intel, Kionix from Japan (a ROHM subsidiary), FPGA designer Lattice Semiconductor, NXP Semiconductors, Qualcomm, design tool makers Silvaco and Synopsys, STMicroelectronics and test set maker Tektronix.
MIPI Alliance plans to offer additional plugfest opportunities later this year in conjunction with member meetings in Atlanta, Ga., USA and Bangalore, India: http://bit.ly/2p0Sf0F
It also includes multi-master support, dynamic addressing, command-code compatibility, and a uniform approach for advanced power management features, such as sleep mode and provides synchronous and asynchronous time-stamping to improve the accuracy of applications that use signals from various sensors. It can also batch and transmit data quickly to minimize energy consumption of the host processor.
Companies tested four master devices and six slave devices during the event. Participating companies include: BitifEye Digital Test Solutions in Germany, Intel, Kionix from Japan (a ROHM subsidiary), FPGA designer Lattice Semiconductor, NXP Semiconductors, Qualcomm, design tool makers Silvaco and Synopsys, STMicroelectronics and test set maker Tektronix.
MIPI Alliance plans to offer additional plugfest opportunities later this year in conjunction with member meetings in Atlanta, Ga., USA and Bangalore, India: http://bit.ly/2p0Sf0F
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