By Nick Flaherty www.flaherty.co.uk
USB3.0 SuperSpeed systems have taken a step forward as Synopsys has certified its DesignWare SuperSpeed USB 3.0 xHCI (Extensible Host Controller Interface) IP for including in a wide range of system-on-chip designs, reducing cost. The core is available in cost effective 65nm and 130nm process technology with leading edge 28nm available by next month.
The xHCI IP has successfully passed the USB Implementers Forum (USB-IF) SuperSpeed USB certification which provides a standardized method for SuperSpeed USB (USB 3.0) host controllers to communicate with the USB 3.0 software stack. To achieve certification, the IP must support the new U1 and U2 power modes as well as all four USB transfer speeds:
- SuperSpeed (5.0 Gbps),
- Hi-Speed (480 Mbps),
- Full-Speed (12 Mbps)
- and Low-Speed USB (1.5 Mbps).
Synopsys is the only USB IP provider with both certified SuperSpeed USB 3.0 Host and Device IP.
The DesignWare SuperSpeed USB 3.0 IP (left) has a unified architecture, enabling designers to significantly lower integration risk by eliminating the requirement to manage two distinct USB 2.0 and USB 3.0 datapaths in their system-on-chip (SoC) designs. The core is optimised for small area and low-power and the USB 3.0 Host Controller is already in products that are in mass production. It is ideal for battery-powered, portable devices.
"Passing SuperSpeed USB certification is a crucial product milestone demonstrating that the Synopsys DesignWare IP meets the standards required for interoperability, which is a cornerstone for the mass adoption of USB," said Jeff Ravencraft, USB-IF president and COO. "Synopsys' proper implementation of the U1 and U2 power saving modes will help extend the battery life in future USB products."
"As a leading developer of USB 3.0 software, it was critical that MCCI partner with Synopsys, a trusted IP provider, for the development of the MCCI USB 3.0 xHCI Datapump Host Stack," said Terry Moore, CEO of MCCI. "Our close collaboration with Synopsys throughout the years has enabled us to create an interoperable USB 3.0 software platform that delivers fast SuperSpeed USB transfer speeds and full legacy support, while taking advantage of power savings from U1 and U2 modes. Whether in an embedded system, on Linux, or as a Windows driver, the MCCI software stack, combined with emulated FPGA hardware, allows developers to focus on system issues early in the development cycle."
The silicon-proven DesignWare SuperSpeed 3.0 USB Device, Host and Dual-Role Device Controllers are available now along with, verification IP, virtual prototype and drivers. The DesignWare SuperSpeed USB 3.0 PHY IP is available in leading 65nm and 130nm process technologies now, with support for 28nm and 40nm process technologies scheduled to be available in the first half of 2011. For more information on DesignWare USB IP, please visit: http://www.synopsys.com/usb
"As a leading developer of USB 3.0 software, it was critical that MCCI partner with Synopsys, a trusted IP provider, for the development of the MCCI USB 3.0 xHCI Datapump Host Stack," said Terry Moore, CEO of MCCI. "Our close collaboration with Synopsys throughout the years has enabled us to create an interoperable USB 3.0 software platform that delivers fast SuperSpeed USB transfer speeds and full legacy support, while taking advantage of power savings from U1 and U2 modes. Whether in an embedded system, on Linux, or as a Windows driver, the MCCI software stack, combined with emulated FPGA hardware, allows developers to focus on system issues early in the development cycle."
The silicon-proven DesignWare SuperSpeed 3.0 USB Device, Host and Dual-Role Device Controllers are available now along with, verification IP, virtual prototype and drivers. The DesignWare SuperSpeed USB 3.0 PHY IP is available in leading 65nm and 130nm process technologies now, with support for 28nm and 40nm process technologies scheduled to be available in the first half of 2011. For more information on DesignWare USB IP, please visit: http://www.synopsys.com/usb
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